“Interfaces” – future expansion

The interface ports are for future interfaces. All data signals 3.3v.

Interface 1 – Debug/Lora extension (28 pin edge)

  • 3v3, 5v and GND
  • DeMon touch screen interface
  • DeMon debug SD card interface
  • Interface to optional LoRa SX1262
  • Description Pin Pin Description
    GND 1 16GND
    3.3v 2 175v
    DeMon I2C1 SDA 3 18DeMon I2C1 SCL
    DeMon SPI1 CSn Debug SD card 4 19DeMon SPI1 CSn Screen
    DeMon SPI1 MOSI 5 20DeMon SPI1 MISO
    DeMon LCD CMD/DATA 6 21DeMon SPI1 SCK
    DeMon Touch interrupt 7 22DeMon LCD + Touch reset
    DeMon SWD IO 8 23DeMon SWD CLK
    ESP32-C5 SX1262 MOSI 9 24ESP32-C5 SX1262 MISO
    ESP32-C5 SX1262 CS 10 25ESP32-C5 SX1262 SCK
    ESP32-C5 SX1262 TX/RX EN 11 26
    ESP32-C5 SX1262 DIO1 (interrupt) 12 27ESP32-C5 SX1262 Reset
    ESP32-C5 SX1262 Busy 13 28NeoPixel data out
    ESP32-C5 USB+ 14 29ESP32-C5 USB-
    GND 15 30GND

    Interface 2 – Audio/Video/Arcade extension (44 pin edge)

  • 3v3, 5v, 12v and GND
  • Audio in and out
  • RGB out, VSync, HSync, Pixel clock and chromakey
  • Additional digital audio out from Jazz
  • 18 GPIO lines
  • Description Pin Pin Description
    GND 1 22GND
    3.3v 2 233.3v
    5v 3 2412v
    Audio L in 4 25Audio R in
    Stereo “headphone” audio out L 5 26Stereo “headphone” audio out R
    Analog RGB R 6 27Analog RGB G
    Analog RGB B 7 28Chromakey
    VSync 8 39Pixel clock out
    HSync 9 30Mono “speaker” audio out
    Jazz Interface I2S LRC 10 31Interface reset
    Jazz Interface I2S DIN/ADAT 11 32Jazz Interface I2S DOUT/DDAT
    Interface GPIO 0 12 33Interface GPIO 1
    Interface GPIO 2 13 34Interface GPIO 3
    Interface GPIO 4 14 35Interface GPIO 5
    Interface GPIO 6 15 36Interface GPIO 7
    Interface GPIO 8 16 37Interface GPIO 9
    Interface GPIO 10 17 38Interface GPIO 11
    Interface GPIO 12 18 39Interface GPIO 13
    Interface GPIO 14 19 40Interface GPIO 15
    Interface GPIO 16 20 41Interface GPIO 17
    GND 21 42GND

    Interface 3 – Memory/User extension (64 pin edge)

  • 3v3, 5v and GND
  • Full data bus, upper/lower byte data mask, and 16 bit word address lines A0 to A23
  • 4 GPIO lines
  • Description Pin Pin Description
    GND 1 34GND
    3.3v 2 353.3v
    5v 3 365v
    Interface connected (short on Interface device)4 37Interface reset
    Interface select A 5 38Interface select B
    Memory WE 6 39Memory OE
    Memory LDM 7 40Memory UDM
    Memory D0 8 41Memory D8
    Memory D1 9 42Memory D9
    Memory D2 10 43Memory D10
    Memory D3 11 44Memory D11
    Memory D4 12 45Memory D12
    Memory D5 13 46Memory D13
    Memory D6 14 47Memory D14
    Memory D7 15 48Memory D15
    Memory A0 (address of 16 bit word, not 8 bit) 16 49Memory A12
    Memory A1 17 50Memory A13
    Memory A2 18 51Memory A14
    Memory A3 19 52Memory A15
    Memory A4 20 53Memory A16
    Memory A5 21 54Memory A17
    Memory A6 22 55Memory A18
    Memory A7 23 56Memory A19
    Memory A8 24 57Memory A20
    Memory A9 25 58Memory A21 (outside SRAM range)
    Memory A10 26 59Memory A22 (outside SRAM range)
    Memory A11 27 60Memory A23 (outside SRAM range)
    Interface GPIO 18 28 61Memory A24 (outside SRAM range)
    Interface GPIO 19 29 62Interface GPIO 23
    Interface GPIO 20 30 63Interface GPIO 24
    Interface GPIO 21 31 64Interface GPIO 25
    Interface GPIO 22 32 65Interface GPIO 26
    GND 33 66GND

    Important: The Ant32 and Ant64 are both still at early design and prototype stage, everything you see here is subject to change.