CPU overclocked from (1x) 150Mhz (1.1v) to (2x) 300Mhz (1.2v), possibly to (3x) 460Mhz (1.5v) – other have driven the RP2350B to over 600Mhz (2v).
This will connect to the SWD port of the “SticKey” chips and “Razz” chip. This will allow it to program those components with their firmware (if it needs updating) and provide hardware debugging for any of the components.
Debug streams will also be sent back from each component and then to the “main processing unit”.
It will be able to reset any of the components remotely. The debug monitor will also control the boot state and act as a watchdog for the Duo “main processing unit”.
DeMon can act as an SPI slave for Duo, it emulates an SD card interface.
The DeMon is actually a RP2350B chip that has connections to the hardware debug ports of the other chips.
USB host for keyboard, mouse, joypad.
The clock chip is the DS3231, the prototype uses a Raspberry Pi DS3231 clock “module”. From left to right (from above, chip at bottom) 3v3, SDA, SCL, NC, GND. The NC connection has been patched so it’s actually connected to pin 3 of the DS3231 (the INT pin).
DeMon has 8MB PSRAM available.
An ESP-C5-WROOM-1-N8R4 chip will be connected to DeMon. This will bring 2.4Ghz/5Ghz Wifi (802.11b/g/n/ax), Thread 1.3, Zigbee 3.0 and Bluetooth 5.3 (LE) and Bluetooth mesh, with RGB status light, Remote "debrick", FRAM interface 3.
Debugging will be supported via the ESP32's USB-C (12mbps), Wifi (2.4Ghz, router needed, up to 54mbps), Bluetooth (2mbps) or ESP Now (2.4Ghz/5Ghz, no router needed, 1mbps), or 62.5Mbps over SPI (in practice this may be closer to 10mbps).
Optional Waveshare Core1262 HF LoRa Module for possible LoraWAN or/and Meshtastic use, with RGB status light.
| Start address | End address | Size | Description |
|---|---|---|---|
| 000000 | 3FFFFF | 400000 | 4MB SRAM |
| 040000 | 7FFFFF | 400000 | Reserved |
| GPIO | Function | GPIO | Function |
|---|---|---|---|
| 0 | PSRAM CSn (future QSPI NOR to Razz?) | 29 | SPI1 CSn – ESP-C5 GPIO10 |
| 1 | Duo RESET | 30 | Handshake - ESP-C5 GPIO8 |
| 2 | TX0 (or PIO UART) – to Duo | 31 | Jazz RUN (hi = on, lo =off) |
| 3 | RX0 (or PIO UART) – from SticKey | 32 | Razz Ready |
| 4 | I2C0 SDA – clock/temp (68) / Controller 0 | 33 | Clock interrupt (pin 3 on DS3231) |
| 5 | I2C0 SCL – , clock/temp /Controller 0 | 34 | Controller 0 detect |
| 6 | Jazz SWD CLK (SM0) | 35 | Controller 1 detect |
| 7 | Jazz SWD IO (SM0) | 36 | Touch INTERRUPT |
| 8 | PWM4A - Buzzer | 37 | PIO RX1 - From Razz (debug text output) |
| 9 | SPI1 CSn - Jazz slave select | 38 | LCD + TOUCH RESET |
| 10 | I2C1 SDA (data) – touch (70) / Controller 1 | 39 | LCD CMD/DATA |
| 11 | I2C1 SCL (clock) –touch / Controller 1 | 40 | Razz Done |
| 12 | ESP-C5 EN pin (switch on/off wifi) | 41 | SPI1 CSn – Debug SD card |
| 13 | Boot mode ESP-C5 GPIO28 (autoprogram) | 42 | Neopixel data (6 LEDs) |
| 14 | TX0 (or PIO UART) ESP-C5 GPIO12 (RX) | 43 | SPI1 TX/MOSI ESP-C5 GPIO23 |
| 15 | RX0 (or PIO UART) ESP-C5 GPIO11 (TX) | 44 | SPI1 RX/MISO ESP-C5 GPIO15 |
| 16 | SPI0 (Duo slave) RX/MOSI SD emulation | 45 | SPI1 CSn – connects to optional 240x320 |
| 17 | SPI0 (Duo slave) CSn | 46 | SPI1 SCK - touch screen / ESP-C5 GPIO9 |
| 18 | SPI0 (Duo slave) SCK | 47 | PSRAM CSn |
| 19 | SPI0 (Duo slave) TX/MISO | SWDIO | ESP32-C5 GPIO26 |
| 20 | SPI0 RX/MISO - JTAG TDI to Razz | SWDCLK | ESP32-C5 GPIO25 |
| 21 | SPI0 CSn - JTAG TMS | ADCREF | |
| 22 | SPI0 SCK - JTAG TCK | 3V3 | |
| 23 | SPI0 TX/MOSI - JTAG TDO | BOOTSEL | |
| 24 | Razz Reconfig | USB D- | Keyboard |
| 25 | SPI1 CSn Cartridge | USB D+ | (12Mbps) |
| 26 | TX1 (or PIO UART) Cartridge NFC RX | RUN | Hardware reset button to 3v3 |
| 27 | RX1 (or PIO UART) Cartridge NFC TX | 3V3 EN | |
| 28 | Cartridge DETECT (CD) | VBUS |
Using SPI1, and different CSn lines, DeMon controls:
| Pin | Function | Pin | Function |
|---|---|---|---|
| 1 | GND | 28 | GND |
| 2 | 3v3 | 27 | IO26 - DeMon SWD IO |
| 3 | EN - DeMon GPIO12, resistor to gnd, button labelled "Unbrick reset" | 26 | IO25 - DeMon SWD CLK |
| 4 | IO2 - FRAM/SX1262 MOSI (set to 1 via resistor = 48Mhz crystal) | 25 | IO11 - DeMon TXD |
| 5 | IO3 - SX1262 DIO1 (set to 0 via resistor = 3.3v flash) | 24 | IO12 - DeMon RXD |
| 6 | IO0 – FRAM CS (set to vcc via resistor) | 23 | IO23 - DeMon Handshake |
| 7 | IO1 – SX1262 Busy | 22 | NC |
| 8 | *IO6/SPI CLK - SX1262 SCK | 21 | IO15 - DeMon SPI MISO |
| 9 | *IO7/SPI D (MISO) - SX1262 MISO | 20 | NC |
| 10 | IO8 – DeMon SPI MOSI | 19 | NC (using internal PSRAM) |
| 11 | IO9 – DeMon SPI CLK | 18 | IO27 – SX1262 CS (set to vcc via resistor) |
| 12 | *IO10/SPI CS0 (IN) DeMon CS | 17 | *IO4 – MTCK/SPI HD |
| 13 | IO13 - USB D- USB-C labelled "Debug", only D+/- connected | 16 | *IO5 – MTDO/SPI WP |
| 14 | IO12 - USB D+ | 15 | IO28 - (in) auto-program (Demon GPIO13, set to 1 via resistor), button labelled "Unbrick boot", (out) SX1262 Reset |
| Start address | End address | Size | Description |
|---|---|---|---|
| 000000 | 3FFFFF | 400000 | 4MB SRAM |
| 040000 | 7FFFFF | 400000 | Reserved |
A 24-pin edge connector cartridge port (37mm 2.54 pitch wide) is connected to DeMon. If present, then this is booted in preference to the SD card slot. If a cart is inserted or swapped whilst powered on, the Ant64 will normally automatically be rebooted to it (this can be disabled in options). However, a cartridge can safely be removed whilst powered on and the Ant64 will not reboot, reinserting the same cartridge will also not reboot.
| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 |
|---|---|---|---|---|---|---|---|---|---|---|---|
| GND | TX | 3.3V | Jazz HSa | CS | TX/MOSI | RX/MISO | CLK | Jazz HSb | CD | RX | GND |
| GND | RX | CD | Jazz HSb | CLK | RX/MISO | TX/MOSI | CS | Jazz HSa | 3.3V | TX | GND |
| 12 | 13 | 14 | 15 | 16 | 17 | 18 | 19 | 20 | 21 | 22 | 23 |
Pins 0/15, and 11/20 on the cartridge will extend further than others.
The ESP32 can unbrick DeMon remotely over wifi or via USB-C.
Important: The Ant32 and Ant64 are both still at early design and prototype stage, everything you see here is subject to change.