This is a MilkV Duo 256 (SG2002 microcontroller), it has 256MB RAM, it has 700Mhz RiscV core and either a 1Ghz RiscV core or a 1Ghz Arm Cortex A53 core, a 25 to 300Mhz 8051 core and a 1 TOPS Tensor unit (TPU). The Ant64 will operate it in RiscV mode. Audio will also go directly from/to the “Jazz” chip.
.The TF card interface (SPI0?) will go to the DeMon chip, which will act as an SD card emulator.
SD1 will go direct to...
Pins 21 to 27 (can be configured as a QSPI NOR Flash interface – they will go direct to the Razz. This way the CPU can communicate with the Razz “gpu” as if it was memory mapped IO.
Duo provides a 100MBPS network port.
The Duo has a fast USB interface.
Slower interfaces will go to the Debug monitor, input controller, audio synthesizer and optional “Network controller”.
The current plan is to have the 700Mhz RiscV core provide the operating system, housekeeping tasks, the “monitor” and the built-in computer languages (BASIC/Action). The 1Ghz RiscV core will provide emulation of various processors to simulate various 8 and 16 bit systems.
When emulating a computer, for example an Amiga A1200. The memory inside the MilkV Duo will be used rather than memory available to the "Razz" chip.
An amiga A1200 has a max memory bandwidth of 28MBytes/sec = 224mbits/sec (a normal amiga is 7Mbytes/sec = 56mbit/sec). With RAM being available to the emulated CPU all the time, it will mean the cpu will emulate as fast as possible.
The simulated GPU in the FPGA will request memory via the MilkV Duo MIPI RX port – which can operate at up to 1.5Gbit/sec and then transmit the requested data through the MIPI TX port – which can operate at up to 2.5Gbit.
There will be a protocol to read from “chip registers” contained in the FPGA by requesting them from the TX port and waiting for them at the RX port.
Start address | End address | Size | Description |
---|---|---|---|
0000000 | 03FFFFF | 0400000 | 4MB SRAM |
0400000 | 07FFFFF | 0400000 | Reserved |
0800000 | 0FFFFFF | 0C00000 | Reserved |
8000000 | FFFFFFF | 8000000 | 128MB SDRAM |
Pin | Description | CPU pin | Function |
---|---|---|---|
1 | GP0 - JTAG TDI | 28 | WTDI / XGPIOA 28 |
2 | GP1 - JTAG TDO | 29 | WTDO / XGPIOA 29 |
3 | GND | ||
4 | GP2 - JTAG TMS | 26 | WTMS / XGPIOA 19 |
5 | GP3 - JTAG TCK | 27 | WTCK / XGPIOA 18 |
6 | GP4 - SD1_D2 - SPINOR1_WP | 52 | SD1 D2 |
7 | GP5 - SD1_D1 - SPINOR1_HOLD | 53 | SD1 D1 |
8 | GND | ||
9 | GP6 - SD1_CLK - SPINOR1_SCK | 56 | SD1 CLK |
10 | GP7 - SD1_CMD - SPINOR1_MOSI | 55 | SD1 CMD |
11 | GP8 - SD1_D0 - SPINOR1_MISO | 54 | SD1 D0 |
12 | GP9 - SD1_D3 - SPINOR1_CS | 51 | SD1 D3 |
13 | GND | ||
14 | GP10 - I2C1 SDA - Razz slave | 85 | Originally 1.8v, now 3.3v (see J1 pin 13) |
15 | GP11 - I2C1 SCL - Razz slave | 86 | Originally 1.8v, now 3.3v (see J1 pin 14) |
16 | GP12 - UART0 TX - to Jazz | 18 | UART0 TX / XGPIOA 16 – connected via 4.7k resistor to 3.3v |
17 | GP13 - UART0 RX - from DeMon | 19 | UART0 RX / XGPIOA 17 – connected via 4.7k resistor to 3.3v |
18 | GND | ||
19 | GP14 – used for SPI (SD0) slave select? | 15 | SD0_PWR / XGPIOA 14 (See SD CARD interface!) |
20 | GP15 – used for SPI (SD0) slave select? | 17 | SPK_EN / XGPIOA 15 |
Pin | Description | CPU pin | Function |
---|---|---|---|
40 | VBUS | ||
39 | VSYS | ||
38 | GND | ||
37 | 3v3 EN | ||
36 | 3v3 OUT | ||
35 | Boot switch (1.8v?) | 67 | GPIO_RTX / XGPIOB 23 – connected via 4.7k resistor to 1.8v |
34 | Audio out (1.8v?) | 4 | PAD_AUD_AOUTR / XGPIOC 24 |
33 | GND | ||
32 | GP27 (1.8v) ADC1 - VSync interrupt via 3.3v conv | 60 | ADC2 / XGPIOB 6 / USB_VBUS_DET |
31 | GP26 (1.8v) ADC0 - HSync interrupt via 3.3v conv | 59 | ADC1 / XGPIOB 3 |
30 | RUN | 38 | (originally 1.8v, now 3.3v?) |
29 | GP22 - Pixel clock input | 41 | (originally 1.8v, now 3.3v) PWR_GPIO 4 |
28 | GND | ||
27 | GP21 - SPINOR_HOLD – NOR interface to Jazz? | 20 | SPINOR_HOLD / XGPIOA 26 |
26 | GP20 - SPINOR_WP | 23 | SPINOR_WP / XGPIOA 27 |
25 | GP19 - SPINOR_MOSI | 22 | SPINOR_MOSI / XGPIOA 25 |
24 | GP18 - SPINOR_SCK | 21 | SPINOR_SCK / XGPIOA 22 |
23 | GND | ||
22 | GP17 - SPINOR_CS | 25 | SPINOR_CS / XGPIOA 24 |
21 | GP16 - SPINOR_MISO | 24 | SPINOR_MISO / XGPIOA 23 |
Pin | Description | CPU pin |
---|---|---|
USB DP | 69 | |
USB DM | 70 |
Pin | Description | CPU pin | Function |
---|---|---|---|
1 | RXN | 62 | XGPIOB 25 |
2 | RXP | 63 | XGPIOB 24 |
3 | GND | ||
4 | TXN | 64 | XGPIOB 27 |
5 | TXP | 65 | XGPIOB 26 |
SDCard | Description | SPI Master | CPU pin | Function |
---|---|---|---|---|
4 | VDD | 3.3v | ||
5 | CLK | SPI0 SCK | 6 | SD0 CLK / XGPIOA 7 |
3 | CMD | SPI0 SDO (MOSI) | 7 | SD0 CMD / XGPIOA 8 |
7 | D0 | SPI0 SDI (MISO) | 8 | 3.3v |
8 | D1 | 10 | C | |
1 | D2 | 11 | SD0 D2 / XGPIOA 11 | |
2 | D3 | SPIO CS | 12 | SD0 D3 / XGPIOA 12 |
CD | Switch DET | SPIO CS | 14 | C |
On Milk V 256M pin 19 | 15 | SD0 PWR EN / XGPIOA 14 |
Pin | Description | CPU pin | CPU Description (All 1.8v only) |
---|---|---|---|
1 | GND | GND | |
2 | MIPI0_DN0 – from Razz | 80 | PAD_MIPI RX0N / XGPIOC 10 |
3 | MIPI0_DP0 – from Razz | 81 | PAD_MIPI RX0P / XGPIOC 11/td> |
4 | GND | GND | |
5 | MIPI0_DN1 – from Razz | 76 | PAD_MIPI RX2N / XGPIOC 6 |
6 | MIPI0_DP1 – from Razz | 77 | PAD_MIPI RX2P / XGPIOC 7 |
7 | GND | GND | |
8 | MIPI0_CKN – from Jazz | 78 | PAD_MIPI RX1N / XGPIOC 8 |
9 | MIPI0_CKP – from Jazz | 79 | PAD_MIPI RX1P / XGPIOC 9 |
10 | GND | GND | |
11 | SENSOR_RSTN (1.8V) | 84 | XGPIOC 17 |
12 | SENSOR_CLK (1.8V) | 88 | XGPIOC 15 |
13 | I2C2_SCL (1.8V) | 85 | XGPIOC 14 / I2C 2 SDA (See main pin 14) |
14 | I2C2_SDA (1.8V) | 86 | XGPIOC 15 / I2C 2 SCL (See main pin 15) |
15 | NC | ||
16 | 3V3 |
Important: The Ant32 and Ant64 are both still at early design and prototype stage, everything you see here is subject to change.